Finally, check PLT_RST# (Platform Reset) at PCH pin J12 (or the BIOS chip pin 6). This is the final master reset. 0V means the PCH never received all power-good signals. Use the schematic to trace back SYS_PWROK and PCH_PWROK .
The 17IPS72 board operates on a flyback-based design with the following primary functional blocks: PFC (Power Factor Correction) Stage: 17ips72 schematic work
The 17IPS72 operates through high-frequency switching. The control IC monitors the output voltages and adjusts the "on-time" of the MOSFET switches to maintain stability. Finally, check PLT_RST# (Platform Reset) at PCH pin
Lenovo does publicly release schematics, but repair communities share them for board-level repair : 17ips72 schematic work